JRC-3

JRC-3, or Josh’s Retro Computer 3, is the third system in my line of home brew retro SBCs. It is the successor to COLE-2.

Unlike it’s predecessor, JRC-3 favors a simpler base system with less features, and adds room to add new features down the road. The intention is to make the base design less complex and easier to design and debug. It will also be going back to its retro roots, with more through-hole components and a full 5V design.

This project is in its early planning stages. At the moment, the planned specs will be:

  • A 4 MHz 65C816 CPU, possibly moving up to faster speeds if the design can handle it. This will largely depend on available static RAM speeds.
  • 1 MB of RAM
  • 256 KB of ROM, capable of in-system reprogramming (W29C020)’
  • CPLD glue logic (JIGL – JRC Integrated Glue Logic)
  • Two 65C22 VIAs
  • NXP 28L92 dual UART controlling two DB-9 serial ports
  • No built-in video; this will be an expansion card as a separate project
  • Two NES-compatible game controller ports
  • SD card for loading the OS and applications
  • Some type of sound, to be determined. Possibly just simple beeps for now
  • Three expansion slots
  • Possibly MicroATX form factor to allow for off-the-shelf case and power supply